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WFD updates are back. I apologize for the hiatus. This note will try to
summarize activities starting from the Texas meeting. The executive
summary is as follows:
We now own the pcb's and parts for 80 wfd motherboards, these are
being assembled at Texas Instruments and will be QC tested at TAMU.
The daughtercard project is lagging, but the "go" button could be
pressed at any time we are ready to commit the final resources.
Nothing new has been accomplished on the readout front; in fact, the
final architecture for the readout is still negotiable. More work has
been done on the switching supply noise, but as of now it remains
unsolved. The first stop master is at GS and will soon be tested. The
START/STOP/CLOCK fanouts are being assembled, as is the 200 MHz clock.
The next phase of work will be in Gran Sasso in August. There we hope
to *really* incorporate a handful of channels in the MACRO daq and
begin to assemble the system. At this time we will finalize decisions
on the daughtercard and readout.
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Human resources: welcome Chris Orth, a Boston U grad student. Chris has
worked on some daughtercard studies this summer and is now at Gran Sasso
learning his way around. Also welcome Kael Hanson, who will be at LNGS
long term and will become a resident expert on the system.
WFD Motherboard: production finally got started in early July, a few
weeks later than originally hoped for. I'd like to thank Gary Ludlam and
Jiangtao Hong for handling the final parts shipment while I was on shift
in June. Long leadtimes were a problem for a handful of critical pieces;
in fact the ECLIPS clock receiver was almost disastrously late. But as
of now, every component is at Texas Instruments where the first boards
are expected off the assembly line next week. Boards will be shipped
in batches of 10-20 each week. They will go directly to TAMU for QC
testing (I will appropriate a handful from the first batch for August
tests at Gran Sasso).
Frontend Daughtercard: the current design is finished except the exact
choice of a few components and pending our satisfaction regarding the
analog response. The main problem is to understand the leading edge
glitch that can occur as fast signals pass through the breakpoint. At
some level, there is nothing we can do about this (other than change to
a linear design). But given the large amount of integration we will do
in August, I decided it would be prudent to hold off just a little
longer before soldering the last of our money onto these boards (the
IC's are already purchased). For August testing, I will have about 16
channels hand assembled (enough for the entire B and C planes for
example). The other reason to hold off is that the daughtercard is the
last line of defense against the noise problem; it is possible that we
can attack it by making some changes here, but I am afraid that would
seriously delay data taking. Bill Earle describes this as "fixing a
leaky pen by wearing rubber gloves".
Readout: it is still ungainly. For August, we will use the VICbus system
and software we have discussed in the past. I hope to also test writing
to uVaX memory from a single-board VME computer in the wfd crate
(recently advocated by Ronga). After we have some more realistic
experience with the system this August, we must commit to some
particular set of hardware and software.
Noise: the WFD can readout a pulser or PMT with no noise problem; an
oscilloscope can readout the PMT fanout with no noise problem; but when
the WFD measures the PMT fanout we see 5-50 mV noise that is associated
with the switching supplies in the WFD crate. Ash has made good progress
in beating the noise down below 10 mV, but we need to get to below 2 mV.
Phil Green joined in and looked at things during his shift in June. For
a collection of messages on this problem, see NOISE-MAIL.TXT in
[MACROUSA.WIFDINFO].
System hardware: there was some unexplained problem with the WFD VME
crate on SM-4 during my shift in June; it seemed to be a backplane
problem where I could not readout reliably with either the VICbus or
my in-crate computer. So we are now down one crate at GS, pending
debug and repair. For August, we will be working on SM-1 where the
Pisani have already vacated the PMT fanout lemo outputs. The GS crew
has already transferred the working setup to that location. We still
need solutions for total power draw (we exceed the rating of the power
strips) and a decent AC plug. As mentioned in the summary, we are
getting experience with the STOP master and WFD fanout. A NIM module
clock will arrive soon, replacing the clip on clock.
That is about it for now. I arrive at LNGS on August 3. Ciao- Ed
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