This is an update on the status of the work for the WFD fix.
The fix we are pursuing has been outlined by Doug in his last email
to this mailing list. This involves increasing the capacitor on the
fanout and decreasing the capacitor on the WFD discriminator circuit.
The increase in the coupling capacitor at the fanout has been defined
to 1mF. We still believe this is part of the final solution. We still have
to verify for any side effects of the 1mF cap. The 1mF cap was dictated
by the 10usecx10V maximum expected PMT signals and their positive overshoot.
Our dark box tests suggest that this is most probably an overestimate by a
factor of at least 3. Base saturation kicks in and limits the output anode
current earlier. This suggests we might be able to do the job with lower,
non-electrolytic capacitor values on the fanouts.
For the coupling capacitor on the discriminator circuit, a 0.05uF cap was
tested. We suggest that this has to be doubled to 0.1uf. The 0.05uF cap
value will result to partial loss of long (>5usec), low amplitude PMT pulses.
The 0.1uF will improve the situation but will not completely solve it
due to the lack of 100% efficiency in discriminating spe's by the WFD
discrimination circuit.
The 1mF/0.1uF capacitor combination is the "fix" that everybody here feels
more comfortable with at this moment. The "high charge", short WFD stop still
has to be finalized.
In what follows, the above items are examined more carefully and numbers
relative to our observations regarding base saturation and spe efficiency are
presented.
Finally, Chris convinced me to throw in Ioannis' suggestion for a fix: Ioannis
suggested to get rid of the zero-suppresion and use all memory (currently
split between ADC and TDC words) for ADC words. This will double the
avaiable time window for digitization, in which case a common stop at
~160usec(?) will cover most of our acceptance for slow particles. Ed, would
something like that be doable?
That's all for now. Please send your comments/questions/remarks as soon
as possible.
--Erik
Capacitor in the Fanouts
========================
Work-bench tests we've performed during the last two weeks have indicated
strange behaviour of the fanout channel that was modified with the 1mF cap.
This involves reduced pulse amplitude and 2mv p-p oscillations; none of
them were observed before. We believe both have to do with the soldering
of the cap and not with a systematic effect. As a cross check we plan to
check ASAP the modified channels currently in MACRO.
People looking at WFD data: notice that channels 3B01-0,3B02-0,3B03-0,3B04-0
have already been modified with the 1mF cap on the fanout.
In addressing the issue of variable WFD stopping scheme, Chris and Ioannis
looked quite extensively in the maximum pulse output of our PMTs.
Their measurements show that our PMT bases are not capable of providing
pulses at the level of ~4V and above for more than ~5usecs. This is due to
the capacitors at the last dynode stages which can not supply the necessary
charge in order to meet the peak anode current. The PMT output at that level
is consistent with loss of gain (effectively you lose the last few dynodes
stages). They've doubled the capacitor value in the last dynode chain and
they thus managed to see the maximum charge delivered by the PMT almost
doubled.
Capacitor in the Disc. Circuitry & SPE's Disc. Efficiency
=========================================================
We performed a number of test-bench measurements over a grid of pulse
width/pulse amplitude values in order to fine tune this capacitor value.
In all of these measurements the LED/PMT set up in the dark box was used
to create real-like (with p.e. stats) PMT pulses. In the table below you
may find the MINIMUM PMT pulse height below which we were starting losing
parts (on the WFD discriminator) of the input pulse. The PMT signals were
observed on the digital scope and the *mean* measured the pulse is reported.
0.05uF 0.1uF 0.2uF 1uF (original design)
-----------------------------------------------------
5usec 30mV 15mV 15mV 12mV
10usec 70mV 25mV 18mV 13mV
20usec >200mV 50mV 18mV 15mV
30usec >200mV 100mV 45mV 20mV
Notice that interruptions in the WFD discriminator signal does not necessarily
imply complete loss of input signal (due to signal pre/post-sampling).
The situation is significantly improved with the 0.1uF capacitor. Larger
capacitor values (>=0.2uF) can do even better BUT they increase the time over
which the negative discriminator stays "on" to values close to our hardware
limit (~100usec). If we really want to increase this capacitor we have to go
to >>1uF (40uF?) capacitors that will do stay "on" longer BUT the overall
overshoot amplitude will never exceed threshold.
It was rather a surprise for us the fact that a 30mV (mean) PMT pulse
followed by the (0.01+0.05)*125 uFohm=7.5usec discriminator RC circuit
couldn't stay above threshold for its entire 5usec duration. This led
us to the question of EFFICIENCY in discriminating spe's by the WFD
discrimination circuitry. We have performed multiple tests that demonstrated
that at our nominal 4mV/spe gain, spe's are not discriminated with 100%
efficiency. It is true that spe's are described with distributions
both in height and width. Our measurement show that over the entire
spe spectrum, 100% efficiency is achivied around 5mV pulses.
At 4mV the efficiency is at about 80% and at 3mV about 60%.