ram chip debugging

Ed Kearns (kearns@budoe.bu.edu)
Fri, 13 May 1994 19:27:40 -0400

There are 8 RAM chips, 1 for each byte of the 64 byte wfd cycle. The
ADC bank is in subaddresses 0x0000 to 0x7ffc; the Time bank is in
subaddresses 0x8000 to 0xfffc. If you store a 32-bit word, such as
0xDEADBEEF, the order of bytes is byte-0 = DE, byte-1 = AD, byte-2 = BE,
byte-3 = EF. Using the map below, you can figure out which chip
corresponds to which byte.
...........................................................................

byte order map of RAM chips
(5C6408-15) for one WFD channel

--------------
ADC bank | byte 3 (EF) |
--------------
--------------
| byte 1 (ad) | Time bank
--------------
--------------
ADC bank | byte 2 (BE) |
--------------
--------------
| byte 0 (de) | Time bank
--------------
--------------
| byte 3 (ef) | Time bank
--------------
--------------
ADC bank | byte 1 (AD) |
--------------
--------------
| byte 2 (be) | Time bank
--------------
--------------
ADC bank | byte 0 (DE) |
--------------
...........................................................................

pin-out for RAM chip (5C6408-15)


Vcc WE_ CE2 A8 A9 A11 OE_ A10 CE1_ DQ8 DQ7 DQ6 DQ5 DQ4
| | | | | | | | | | | | | |
-----------------------------------------------------------------------
| 28 27 26 25 24 23 22 21 20 19 18 17 16 15 |
| |
| |
| |
| |
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 |
-----------------------------------------------------------------------
| | | | | | | | | | | | | |
nc A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ1 DQ2 DQ3 Vss
............................................................................